Product Summary

The AT28HC64B-70TU is a high-performance electrically-erasable and programmable readonly memory (EEPROM). Its 64K of memory is organized as 8,192 words by 8 bits. Manufactured with advanced nonvolatile CMOS technology, the AT28HC64B-70TU offers access times to 55 ns with power dissipation of just 220 mW. When the device is deselected, the CMOS standby current is less than 100 μA. The AT28HC64B-70TU is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 64-byte page register to allow writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to 64 bytes of data are internally latched, freeing the address and data bus for other operations. Following the initiation of a write cycle, the AT28HC64B-70TU will automatically write the latched data using an internal control timer.

Parametrics

AT28HC64B-70TU absolute maximum ratings: (1)Temperature Under Bias: -55 to +125℃; (2)Storage Temperature: -65 to +150℃; (3)All Input Voltages (including NC Pins) with Respect to Ground: -0.6 V to +6.25 V; (4)All Output Voltages with Respect to Ground: -0.6 V to VCC + 0.6 V; (5)Voltage on OE and A9 with Respect to Ground: -0.6 V to +13.5V.

Features

AT28HC64B-70TU features: (1)Fast Read Access Time: 70 ns; (2)Automatic Page Write Operation: Internal Address and Data Latches for 64 Bytes; (3)Fast Write Cycle Times: Page Write Cycle Time: 10 ms Maximum (Standard) 2 ms Maximum); 1 to 64-byte Page Write Operation; (4)Low Power Dissipation: 40 mA Active Current; 100μA CMOS Standby Current; (5)Hardware and Software Data Protection; (6)DATA Polling and Toggle Bit for End of Write Detection; (7)High Reliability CMOS Technology: Endurance: 100,000 Cycles; Data Retention: 10 Years; (8)Single 5 V ±10% Supply; (9)CMOS and TTL Compatible Inputs and Outputs; (10)JEDEC Approved Byte-wide Pinout; (11)Industrial Temperature Ranges; (12)Green (Pb/Halide-free) Packaging Option.

Diagrams

AT28HC64B-70TU circuit diagram

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AT28HC64B-70TU
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